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The Foundry / Customer Partnership Pitch: Selling Capacity When the Wafer Is the Product

A Presentation Gurus breakdown: how to build a winning Semiconductors & Advanced Hardware Decks pitch.

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Presentation Gurus — Pitch Deck Breakdown: The Foundry / Customer Partnership Pitch

Highlight

  • This deck type lives or dies on the credibility of the process roadmap, not the price per wafer. Fabless decision-makers assume every foundry claims superior technology — the deck must demonstrate why this specific node and yield curve are worth a multi-year lock-in.
  • Capacity guarantees are the single point of friction. The fabless partner is betting its entire product roadmap on one fab’s ability to deliver; if the deck hedges on allocation terms, the relationship dies before the nondisclosure agreement is signed.
  • The narrative arc follows a Capital Project Approval framework. The fabless company is effectively voting to commit millions in NRE and tooling — the deck must mirror the rigor of a capital committee request, not a sales pitch.
  • References to real process nodes — N3E, 22FDX, SiGe BiCMOS — are non-negotiable. Generic semiconductor imagery signals that the foundry lacks the deep process expertise the fabless partner needs to trust.
  • The financial model must separate wafer cost from yield improvement over the agreement’s life. A flat unit price reads as amateur; a curve that shows shared yield learning reads as a genuine partnership.
  • Intellectual property guardrails must appear before the product slide. A fabless partner’s primary unspoken fear is that the foundry will use their design IP to chase other customers on the same node — the deck must address that before process parameters.
  • The storytelling engine uses SCQA — Situation, Complication, Question, Answer — because the fabless partner arrives with a solved product architecture and needs validation that the foundry can execute that architecture at scale.

Presentation Design Process

Four Steps, One Simple Process

This is a straightforward, side-by-side collaboration designed to remove all the traditional complexity from the process. We work together seamlessly via Microsoft Teams or your preferred online platform, sharing our screens to review layout, story, and graphics in real time. This allows us to capture your immediate feedback and make instant adjustments on the spot.

It completely eliminates the old, slow friction of scheduling formal office visits and waiting days for revisions. It is faster, highly convenient, and ensures you get exactly what you need to succeed.

1

Presentation Discovery

We start by learning exactly who’s in the room, then how you want to use the slide deck, the core message, and the one goal it needs to achieve the moment you finish presenting.

2

Story & Design

First, we build two custom visual direction slide concepts, matched to the goal of the slide presentation. We also map out the story in a simple, un-styled wireframe. Both are completed side-by-side.

3

Fast Revisions

Quick morning sprints refine the deck together in real time, getting shorter each round, from a full assembly session down to just minutes, until every slide is locked in.

4

Full Handoff

After revisions, and when you are 100% satisfied with the presentation, you settle the invoice. You’ll get a fully editable file in PowerPoint, Keynote, or Google Slides, plus a half-hour coaching session so you can present with total confidence.

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The Foundry Deck's Real Audience

The fabless chip company sits across the table with a taped-out design, a wafer start target, and a quiet concern no one will state aloud: is this foundry going to treat us like a volume customer or a development partner? This is not a commodity procurement. The fabless partner is committing its next-generation product — potentially its entire revenue horizon — to a process node that may not hit target yield for eighteen months. The stakes are asymmetrical. The foundry loses a line item. The fabless company loses a market window, an entire SoC generation, and the trust of its own customers. A deck that opens with capacity tables and price-per-wafer figures misses the actual decision: can this foundry’s process team learn faster alongside our design team than the competition’s can? That question is operational, not transactional. The deck must prove the foundry understands the fabless partner’s product timeline better than the fabless partner’s own operations team does — because if that trust doesn’t land in the first three slides, the rest of the presentation becomes a negotiation over details that will never matter.

Why This Deck Is a Different Animal from Other Hardware Pitches

A semiconductor foundry pitch does not resemble a component supplier deck or a contract manufacturer proposal. Those relationships involve spec sheets and purchase orders. This one involves process development kits, mask sets, and a shared dependency on defect density curves that neither party fully controls. The fabless partner’s engineering team is evaluating a technology partnership that will consume millions in non-recurring engineering costs before a single functional die ships. The foundry’s manufacturing team is evaluating whether to dedicate clean-room capacity that could otherwise serve higher-margin customers. Neither party sees the full picture alone. The real external force here is the capital intensity of advanced-node fabrication. A single 300mm wafer at a leading-edge node like N3 or N2 carries a cost that makes automotive supply chains look low-stakes. TSMC’s 2023 capital expenditure of $30 billion is not an abstract data point — it is the competitive backdrop. The deck must show the fabless partner that the foundry can make that kind of investment stick to a specific process roadmap without passing every risk downstream. That means talking about yield learning curves, defect density targets, and bin-sort distributions in the same room where someone is also talking about payment terms.

Building the Deck: Sequence, Substance, and the Capital Project Arc

This deck follows a Capital Project Approval Arc because that is what the fabless partner’s decision committee is actually running. The fabless company’s chief technology officer and chief financial officer will evaluate this proposal the same way they evaluate a new tape-out flow or a new EDA tool investment — through a lens of risk-adjusted return on engineering spend, not marketing enthusiasm. The sequence must respect that frame. Start with a Process-Competence Slide that names the specific node, the target customer application, and the reference process data from a known competitive baseline. Do not lead with capacity numbers. Lead with the engineering validation that makes the capacity relevant. Second slide: the Capacity & Allocation Model. The fabless partner needs to see committed wafer starts per quarter, ramp-up timelines, and bin-sort yield targets stated as ranges, not promises. Third slide: the Financial Partnership Structure. This is where the deck breaks from a standard sales proposal. Show the NRE amortization curve, the wafer price trajectory as yield improves, and — critically — how risk is shared if the process falls behind the yield learning curve. Fourth slide: IP Protection Framework. This is the trust slide. Detail the firewalls, the audit rights, the restrictions on process reuse. The fabless partner’s quiet fear is that the foundry will take the design innovations from this partnership and bake them into the standard cell library offered to the next customer. Address that openly. Fifth slide: the Joint Development Roadmap. Lay out the engineering milestones — PDK releases, tape-out support milestones, characterization targets — as a shared timeline. End with a Commitment Slide that asks for a specific next step: a process qualification run, a joint review of the PDK, or a definitive agreement with a launch date. Every slide answers one question the Capital Project committee is already asking.

When the Engineering Detail Exceeds Internal Capability

The gap between a generic foundry pitch and a winning one is almost always a matter of technical depth. Most foundry marketing decks use the same semiconductor imagery and the same ‘advanced node capabilities’ boilerplate. The fabless partner’s technical staff sees through that in seconds. What they need is a deck that reads like an engineering brief: process cross-sections drawn to scale, electromigration data presented as actual measurements, and a yield ramp projection that accounts for defect Pareto charts from the foundry’s existing runs on similar nodes. Very few internal teams have both the semiconductor domain fluency and the presentation design discipline to produce that. The presentation design shop that built the standard corporate overview deck is the wrong resource for this. A foundry partnership deck requires someone who can read a transistor cross-section, understand why a front-end-of-line defect matters more than a back-end-of-line defect for this specific node, and then translate that technical hierarchy into a visual flow an executive committee can follow. Presentation Gurus works with semiconductor teams precisely at this intersection of process engineering depth and decision-making clarity. The deliverable is a work order for a deck that makes the fabless partner’s CTO think ‘this foundry understands my product timeline better than I do’ — not a sentence about being ‘a trusted partner.’

The SCQA Engine That Makes the Partnership Stick

This deck type’s storytelling structure is SCQA — Situation, Complication, Question, Answer — and the reason matters for how the fabless partner engages with the material. A fabless chip company does not arrive at the meeting unsure of its own product. The situation is already settled: the design exists, the market window is known, the competitive landscape is mapped. The foundry pitch cannot pretend to be a blank-sheet discovery. The complication is that the foundry’s process capability, capacity commitments, and IP protections are unproven from this partner’s perspective. The deck’s job is to surface that complication directly — not to smooth it over — and then answer it with specific engineering, commercial, and legal responses. The fabless partner’s attention pattern is skeptical and detail-forward. They skip narrative flourishes. They double back on yield assumptions. They tune out during standard corporate ‘mission and vision’ slides. SCQA works because it mirrors their own engineering problem-solving discipline: here is the known situation, here is the specific risk we both need to solve, here is the question that risk creates, and here is our answer. The structure demonstrates partnership by walking through a shared problem to a shared solution.

Conclusion

The foundry relationship pitch is not a negotiation over unit economics — it is a confidence vote on a multi-year technical collaboration. The fabless partner needs to see that the foundry understands its product, its timeline, and its risk profile with the same depth the foundry applies to its own process roadmap. A deck that delivers that clarity accelerates trust. A deck that delivers wafer counts without engineering substance accelerates nothing. The question is not whether the capacity exists. The question is whether the foundry can execute within the fabless partner’s competitive reality — and the deck is the single document that answers that.

If you need help creating a winning Semiconductors & Advanced Hardware Decks pitch and would like our presentation specialists’ help, call J.R. for a complimentary discovery and review of your project.

References

  1. SEMI — World Fab Forecast — https://www.semi.org/en/products-services/fab-database/world-fab-forecast
    Grounds the capacity-planning context by showing real fab construction and equipment spending data.
  2. TSMC — Q4 2023 Earnings Call Transcript — https://www.tsmc.com/english/investorRelations/quarterly_results
    Provides the capital expenditure and advanced-node yield learning context that sets the competitive backdrop for any foundry pitch.
  3. IC Knowledge — Cost and Price of Semiconductor Wafers — https://www.icknowledge.com/economics/wafer_prices.html
    Supports the financial modeling section by establishing real wafer cost benchmarks across process nodes.
  4. Arm — Arm Total Design Foundry Partnership Program — https://www.arm.com/partners/total-design
    Illustrates the real-world structure and terms of foundry-fabless partnerships for advanced SoC development.
  5. SIA (Semiconductor Industry Association) — 2023 State of the U.S. Semiconductor Industry — https://www.semiconductors.org/resources/2023-state-of-the-u-s-semiconductor-industry/
    Provides the industry-wide IP protection and trade secret context that fabless companies evaluate during foundry negotiations.
  6. Yole Group — Status of the Semiconductor Foundry Industry 2024 — https://www.yolegroup.com/product/report/status-of-the-semiconductor-foundry-industry/
    Grounds the competitive landscape between pure-play foundries and the strategic position each node class holds.

Written By Presentation Gurus

JR, Founder and Creative Director, Presentation Gurus
Founder &
Creative Director

J.R. founded Presentation Gurus in 1997, growing a marketing side hustle into a global studio serving startups, investors, and Fortune 500s. With three decades of experience, he personally leads every project as the client contact. He applies this same narrative-first process—honed across thousands of pitches—to every article, guide, and case study. Learn More